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        小觅魔方NV2 TX2 编译设备树 开启剩余四个USB - 龙渊阁
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      <h1 id="2020-11-18-更新">2020-11-18 更新</h1>
<ul>
<li>经过实验，只需要把ODMDATA更改为0x609000，即可实现开启W7的USB2.0和W8&amp;W9的PCIe-USB3.0功能。</li>
<li>这样已经足够用了，无需下面这么麻烦。</li>
</ul>
<h1 id="前言">前言</h1>
<h3 id="小觅cube-nv2-tx2硬件连接">小觅CUBE NV2-TX2硬件连接</h3>
<table>
<thead>
<tr>
<th></th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td>W8&amp;W9</td>
<td>PCIe-USB3.0 转接口（1xPCIe-to-4xUSB3.0，共享5.0GHz带宽）</td>
</tr>
<tr>
<td>W7</td>
<td>USBSS0（靠近PCB板侧，即下侧USB） + USBSS1</td>
</tr>
</tbody>
</table>
<ul>
<li>Tegra自带USB 控制器名称： <code>tegra-xusb</code></li>
<li>PCIe-USB扩展 控制器名称： <code>xhci_hcd</code></li>
</ul>
<p><img src="CUBE_USB.jpg" alt="CUBE_USB"></p>
<h3 id="jetsontx2--lane-mapping-configurations">JetsonTX2  Lane Mapping Configurations</h3>
<ul>
<li>
<p>Jetso2的默认通道映射配置为2，仅开启了1个USB3.0和4个PCIe。</p>
</li>
<li>
<p>小觅魔方使用了2个原生USB3.0接口，并通过PCIe接口拓展出了4个USB3.0接口。</p>
</li>
</ul>
<p><img src="Lane_Mapping_Configurations.jpg" alt="Lane_Mapping_Configurations"></p>
<ul>
<li>综上，需要将通道映射配置为3，开启2个USB3.0和3个PCIe接口。</li>
</ul>
<h3 id="odmdata-----与pcieusb配置相关">ODMDATA &mdash; 与PCIE&amp;USB配置相关</h3>
<ul>
<li>
<p>配置修改路径: <code>Linux_for_Tegra/p2771-0000.conf.common</code></p>
</li>
<li>
<p>查看ODMDATA</p>
<p><img src="ODMDATA.jpg" alt="ODMDATA"></p>
<blockquote>
<p>Lane allocation can be performed by either ODMDATA, in p2771-0000.conf.common by default, or alloted to UPHY to each client in the bpmp-dtb file.<br>
For example:<br>
ODMDATA=0x1090000 default for Jetson TX2 for Configuration #2<br>
ODMDATA=0x90000 for Configuration #1<br>
ODMDATA=0x6090000 for Configuration #3<br></p>
</blockquote>
</li>
<li>
<p>ODMDATA  = 0x609000</p>
<p><img src="ODMDATA_0x609000.jpg" alt="ODMDATA_0x609000"></p>
</li>
<li>
<p>ODMDATA  = 0x709000</p>
<p><img src="ODMDATA_0x709000.jpg" alt="ODMDATA_0x709000"></p>
</li>
</ul>
<h1 id="设置步骤">设置步骤</h1>
<h3 id="修改odmdata值">修改ODMDATA值</h3>
<ul>
<li>
<p>将文件<code>p2771-0000.conf.common</code>中的ODMDATA修改为<code>0x6090000</code></p>
<p><img src="ODMDATA_Set_0x609000.jpg" alt="ODMDATA_Set_0x609000"></p>
</li>
</ul>
<h3 id="修改设备树文件">修改设备树文件</h3>
<ul>
<li>
<p>修改tegra186-quill-p3310-1000-a00-00-base.dts文件，更改如下：</p>
<pre><code>#if TEGRA_XUSB_PADCONTROL_VERSION &gt;= DT_VERSION_2
    xhci@3530000 {
        status = &quot;okay&quot;;
        phys = &lt;&amp;{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}&gt;,
            &lt;&amp;{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}&gt;,
            &lt;&amp;{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}&gt;,
            &lt;&amp;{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}&gt;;
        phy-names = &quot;usb2-0&quot;, &quot;usb2-1&quot;, &quot;usb2-2&quot;, &quot;usb3-1&quot;;
    };
#else
    xhci@3530000 {
        status = &quot;okay&quot;;
        phys = &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)&gt;,
            &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)&gt;,
            &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)&gt;,
            &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)&gt;;
        phy-names = &quot;utmi-0&quot;, &quot;utmi-1&quot;, &quot;utmi-2&quot;, &quot;usb3-1&quot;;
        nvidia,boost_cpu_freq = &lt;800&gt;;
    };
#endif

#if TEGRA_XUSB_PADCONTROL_VERSION &gt;= DT_VERSION_2
    xusb_padctl@3520000 {
        status = &quot;okay&quot;;
        pinctrl-0 = &lt;&amp;vbus_en0_default_state&gt;;
        pinctrl-1 = &lt;&amp;vbus_en1_default_state&gt;;
        pinctrl-2 = &lt;&amp;vbus_en0_sfio_tristate_state&gt;;
        pinctrl-3 = &lt;&amp;vbus_en1_sfio_tristate_state&gt;;
        pinctrl-4 = &lt;&amp;vbus_en0_sfio_passthrough_state&gt;;
        pinctrl-5 = &lt;&amp;vbus_en1_sfio_passthrough_state&gt;;
        pinctrl-names = &quot;vbus_en0_default&quot;, &quot;vbus_en1_default&quot;,
            &quot;vbus_en0_sfio_tristate&quot;, &quot;vbus_en1_sfio_tristate&quot;,
            &quot;vbus_en0_sfio_passthrough&quot;, &quot;vbus_en1_sfio_passthrough&quot;;

        pads {
            usb2 {
                lanes {
                    usb2-0 {
                        nvidia,function = &quot;xusb&quot;;
                        status = &quot;okay&quot;;
                    };
                    usb2-1 {
                        nvidia,function = &quot;xusb&quot;;
                        status = &quot;okay&quot;;
                    };
                    usb2-2 {
                        nvidia,function = &quot;xusb&quot;;
                        status = &quot;okay&quot;;
                    };
                };
            };
            usb3 {
                lanes {
                    usb3-0 {
                        nvidia,function = &quot;xusb&quot;;
                        status = &quot;okay&quot;;
                    };
                    usb3-1 {
                        nvidia,function = &quot;xusb&quot;;
                        status = &quot;okay&quot;;
                    };
                    usb3-2 {
                        nvidia,function = &quot;xusb&quot;;
                        status = &quot;okay&quot;;
                    };
                };
            };
        };

        ports {
            usb2-0 {
                status = &quot;okay&quot;;
                mode = &quot;otg&quot;;
                vbus-supply = &lt;&amp;vdd_usb0_5v&gt;;
                nvidia,oc-pin = &lt;0&gt;;
            };
            usb2-1 {
                status = &quot;okay&quot;;
                mode = &quot;host&quot;;
                vbus-supply = &lt;&amp;vdd_usb1_5v&gt;;
                nvidia,oc-pin = &lt;1&gt;;
            };
            usb2-2 {
                status = &quot;okay&quot;;
                mode = &quot;host&quot;;
                vbus-supply = &lt;&amp;battery_reg&gt;;//modify :org-vdd_usb2_5v
                nvidia,oc-pin = &lt;1&gt;;//add 
            };
            usb3-1 {
                nvidia,usb2-companion = &lt;1&gt;;
                status = &quot;okay&quot;;
                //add -s
                nvidia,function = &quot;xusb&quot;;
                nvidia,port-cap = &lt;TEGRA_PADCTL_PORT_HOST_ONLY&gt;;
                nvidia,lanes = &quot;otg-2&quot;;
                //add -e
            };
        };
    };
#endif
    pinctrl@3520000 {
        status = &quot;okay&quot;;
        pinctrl-0 = &lt;&amp;tegra_xusb_padctl_pinmux_default&gt;;
        pinctrl-1 = &lt;&amp;vbus_en0_sfio_tristate_state&gt;;
        pinctrl-2 = &lt;&amp;vbus_en1_sfio_tristate_state&gt;;
        pinctrl-3 = &lt;&amp;vbus_en0_sfio_passthrough_state&gt;;
        pinctrl-4 = &lt;&amp;vbus_en1_sfio_passthrough_state&gt;;
        pinctrl-5 = &lt;&amp;vbus_en0_default_state&gt;;
        pinctrl-6 = &lt;&amp;vbus_en1_default_state&gt;;
        pinctrl-names = &quot;default&quot;,
            &quot;vbus_en0_sfio_tristate&quot;, &quot;vbus_en1_sfio_tristate&quot;,
            &quot;vbus_en0_sfio_passthrough&quot;, &quot;vbus_en1_sfio_passthrough&quot;,
            &quot;vbus_en0_default&quot;, &quot;vbus_en1_default&quot;;
        tegra_xusb_padctl_pinmux_default: pinmux {
            /* Quill does not support usb3-micro AB */
            usb2-micro-AB {
                nvidia,lanes = &quot;otg-0&quot;;
                nvidia,function = &quot;xusb&quot;;
                nvidia,port-cap = &lt;TEGRA_PADCTL_PORT_OTG_CAP&gt;;
                nvidia,oc-pin = &lt;0&gt;;
            };
            usb2-std-A-port2 {
                nvidia,lanes = &quot;otg-1&quot;;
                nvidia,function = &quot;xusb&quot;;
                nvidia,port-cap = &lt;TEGRA_PADCTL_PORT_HOST_ONLY&gt;;
                nvidia,oc-pin = &lt;1&gt;;
            };			
            usb3-std-A-port2 {
                nvidia,lanes = &quot;usb3-0&quot;;//modify  :org- usb3-1
                nvidia,port-cap = &lt;TEGRA_PADCTL_PORT_HOST_ONLY&gt;;
                nvidia,oc-pin = &lt;1&gt;;
            };
            //add :usb3-std-A-port3
            usb3-std-A-port3 {
                nvidia,lanes = &quot;usb3-1&quot;;
                nvidia,port-cap = &lt;TEGRA_PADCTL_PORT_HOST_ONLY&gt;;
                nvidia,oc-pin = &lt;1&gt;;
            };

            e3325-usb3-std-A-HS {
                nvidia,lanes = &quot;otg-2&quot;;
                nvidia,function = &quot;xusb&quot;;
                nvidia,port-cap = &lt;TEGRA_PADCTL_PORT_HOST_ONLY&gt;;
                status = &quot;okay&quot;;//modify  :org-disabled
            };

            e3325-usb3-std-A-SS {
                nvidia,lanes = &quot;usb3-0&quot;;
                nvidia,port-cap = &lt;TEGRA_PADCTL_PORT_HOST_ONLY&gt;;
                status = &quot;disabled&quot;;
            };
        };
    };
    pcie-controller@10003000 {
        status = &quot;okay&quot;;
        pci@1,0 {
            nvidia,num-lanes = &lt;2&gt;;
            status = &quot;okay&quot;;
        };
        pci@2,0 {
            nvidia,num-lanes = &lt;1&gt;;
            status = &quot;okay&quot;;//modify :org-disabled
        };
        pci@3,0 {
            nvidia,num-lanes = &lt;1&gt;;
            status = &quot;okay&quot;;
        };
    };	
</code></pre>
</li>
<li>
<p>修改tegra186-quill-p3310-1000-a00-plugin-manager.dtsi文件，注释掉以下程序段，更改如下：</p>
<pre><code class="language-dtsi">//modify 
        /*
        fragment-500-pcie-config {
            ids = &quot;&gt;=3310-1000-500&quot;;
            override@0 {
                target = &lt;&amp;tegra_pcie&gt;;
                _overlay_ {
                    pci@1,0 {
                        nvidia,num-lanes = &lt;4&gt;;
                    };
                    pci@2,0 {
                        nvidia,num-lanes = &lt;0&gt;;
                    };
                    pci@3,0 {
                        nvidia,num-lanes = &lt;1&gt;;
                    };
                };
            };
        };
        */

/*modify 
        fragment-500-e3325-pcie {
            enable-override-on-all-matches;
            ids = &quot;&gt;=3310-1000-500&quot;;
            odm-data = &quot;enable-pcie-on-uphy-lane0&quot;;
            override@0 {
                target = &lt;&amp;{/xhci@3530000}&gt;;
#if TEGRA_XUSB_PADCONTROL_VERSION &gt;= DT_VERSION_2
                _overlay_ {
                    phys = &lt;&amp;{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}&gt;,
                        &lt;&amp;{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}&gt;,
                        &lt;&amp;{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}&gt;;
                    phy-names = &quot;usb2-0&quot;, &quot;usb2-1&quot;, &quot;usb2-2&quot;;
                };
#else
                _overlay_ {
                    phys = &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)&gt;,
                        &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)&gt;,
                        &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)&gt;;
                    phy-names = &quot;utmi-0&quot;, &quot;utmi-1&quot;, &quot;utmi-2&quot;;
                };
#endif
            };
            override@1 {
#if TEGRA_XUSB_PADCONTROL_VERSION &gt;= DT_VERSION_2
                target = &lt;&amp;xusb_padctl&gt;;
                _overlay_ {
                    ports {
                        usb3-0 {
                            status = &quot;disabled&quot;;
                        };
                    };
                };
#else
                target = &lt;&amp;tegra_xusb_padctl_pinmux_default&gt;;
                _overlay_ {
                    usb3-std-A-port2 {
                        status = &quot;disabled&quot;;
                    };
                };
#endif
            };

            override@2 {
                target = &lt;&amp;tegra_main_gpio&gt;;
                _overlay_ {
                    pcie0_lane2_mux {
                        status = &quot;okay&quot;;
                    };
                };
            };
        };*/	
</code></pre>
</li>
<li>
<p>修改tegra186-quill-p3310-1000-c03-00-base.dts文件，更改如下：</p>
<pre><code>gpio@2200000 {
        sdmmc-wake-support-input {
            status = &quot;okay&quot;;
        };

        sdmmc-wake-support-output {
            status = &quot;okay&quot;;
        };
        //add : pcie0_lane2_mux
        pcie0_lane2_mux{
            status = &quot;okay&quot;;
        };
    };

pcie-controller@10003000 {
        pci@1,0 {
            nvidia,num-lanes = &lt;2&gt;;//modify :org-4
            nvidia,disable-clock-request;
            status = &quot;okay&quot;;//add 
        };
        pci@2,0 {
            nvidia,num-lanes = &lt;1&gt;;//modify :org-0
            status = &quot;okay&quot;;//add 
        };
        pci@3,0 {
            nvidia,num-lanes = &lt;1&gt;;
            status = &quot;okay&quot;;//add 
        };
    };

        xhci@3530000 {
        phys = &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)&gt;,
            &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)&gt;,
            &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)&gt;,
            &lt;&amp;tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)&gt;;
        phy-names = &quot;utmi-0&quot;, &quot;utmi-1&quot;, &quot;utmi-2&quot;, &quot;usb3-0&quot;;
    };
</code></pre>
</li>
<li>
<p>修改tegra186-quill-power-tree-p3310-1000-a00-00.dtsi文件，更改如下：</p>
<pre><code>pinctrl@3520000 {
        vbus-0-supply = &lt;&amp;vdd_usb0_5v&gt;;
        vbus-1-supply = &lt;&amp;vdd_usb1_5v&gt;;
        vbus-2-supply = &lt;&amp;battery_reg&gt;;//modify :org-vdd_usb2_5v
        vbus-3-supply = &lt;&amp;vdd_usb2_5v&gt;;//modify :org-battery_reg
        vddio-hsic-supply = &lt;&amp;battery_reg&gt;;
        avdd_usb-supply = &lt;&amp;spmic_sd3&gt;;
        vclamp_usb-supply = &lt;&amp;spmic_sd2&gt;;
        avdd_pll_erefeut-supply = &lt;&amp;spmic_sd2&gt;;
    };
</code></pre>
</li>
</ul>
<h3 id="编译烧写设备树">编译烧写设备树</h3>
<ul>
<li>
<p>编译设备树请参考 <a href="../2020-11-16-JetsonTX2%E7%BC%96%E8%AF%91%E5%86%85%E6%A0%B8%E5%92%8C%E8%AE%BE%E5%A4%87%E6%A0%91/">JetsonTX2编译内核和设备树</a></p>
</li>
<li>
<p>烧写内核与设备树</p>
<pre><code>sudo ./flash.sh -r -K kernel/Image -d kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb -o 0x6090000 p2771-0000.conf.common jetson-tx2 mmcblk0p1
</code></pre>
<ul>
<li>
<p>我用的是这条指令，但仍然会同时烧录内核，不清楚要怎么改</p>
<pre><code>sudo ./flash.sh -r -d kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb -o 0x6090000 p2771-0000.conf.common jetson-tx2 mmcblk0p1
</code></pre>
</li>
</ul>
</li>
</ul>
<h1 id="参考文档">参考文档</h1>
<ol>
<li><a href="https://blog.csdn.net/rendog/article/details/102869116">JetPack4.2.2系统上修改TX2配置为配置3</a></li>
<li><a href="https://www.jianshu.com/p/7e9385d0e538">TX2 Carrier Board USB Debug (JetPack4.2)</a> (这个作者的方法要更简单，但我没有去尝试)</li>
</ol>

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